AN133_MC3401 VFD driver control using MC80F0308

Modify block diagram of LCD Bias in Figure 18-3 LCD Bias Control The figures of flash writer were updated in "1. OVERVIEW" on page 1.
Config Read Voltage(VCONFIG), maximum VDD Start Voltage(VSTART) and Figure 7-1were added in "7.3 DC Electrical Characteristics" on page 21.
In case AVREF voltage was less than VDD voltage for ADC, the table-note and note were added in "7.5 A/D Converter Characteristics" on page 22 and "15. ANALOG TO DIGITAL CONVERTER" on page 75.

Operating temperature is changed to -40 ~ + 85 celsius.

Operating temperature is changed to -40 ~ + 85 celsius.

Preliminary

The package with push-pull REMOUT port is removed from line-up. The removed devices are MC40P5102 and, MC40P5304.
The 20TSSOP package model MC40P5004R is added to line-up.

FLASH timing information is changed.

"Typical Characteristics" is updated.

Remove rising/falling time at LVR electrical characteristics.
Change „1.83v‟ to “POR level” in POR description.
The package diagram of 44 MQFP is fixed.
Add POR level at “DC CHARACTERISTICS”.
Add ROM option read timing information.
Add “Typical Characteristics”.

The figures of flash writer were updated in "1. OVERVIEW" on page 1.
In case AVDD voltage was less than VDD voltage for ADC, the table-note and note were added in "7.3 A/D Converter Characteristics" on page 16 and "15. ANALOG TO DIGITAL CONVERTER" on page 74.
The recommended load capacitor values for main-oscillator and sub-oscillator circuit were decided to 10pF~30pF in "21.OSCILLATOR CIRCUIT" on page 104.

1) Rearranged device order and fixed some errata.
2) The figures of flash writer were updated in "1. OVERVIEW" on page 1.
3) Config Read Voltage(VCONFIG), maximum VDD Start Voltage(VSTART) and Figure 7-1 were added in "7.4 DC Electrical Characteristics" on page 16.
4) The recommended loadcapacitor values for main-oscillator circuit were added to 10pF~30pF in "10. CLOCK GENERATOR" on page 42.
5) In case AVREF voltage was less than VDD voltage for ADC, the table-note and note were added in "7.3 A/D Converter Characteristics" on page 15 and "14. ANALOG TO DIGITAL CONVERTER" on page 69.

The figures of flash writer are updated in "1. OVERVIEW" on page 1.
The recommended loadcapacitor values for main-oscillator/sub-oscillator circuit are changed to 10pF~30pF instead of 20pF and 30pF in "23. OSCILLATOR CIRCUIT" on page 102.
COB type are added in "B. MASK ORDER SHEET(MC80C7108)" on page xii, "C. MASK ORDER SHEET(MC80C7308)" on page xiii and "D. MASK ORDER SHEET(MC80C7408)" on page xiv.

Add “16TSSOP” at 16pin pin assignment page.
Remove fxt(sub-clock source) at block diagrams and register descriptions of T0/1/2 and Buzzer.

The figures of flash writer are updated in "1. OVERVIEW" on page 1.
The recommended loadcapacitor values for main-oscillator/sub-oscillator circuit are changed to 10pF~30pF instead of 20pF
and 30pF in "24. OSCILLATOR CIRCUIT" on page 98.
COB type is added in "B. MASK ORDER SHEET(MC80C7208)" on page xii.

Preliminary

“23.3 Hardware Conditions to Enter the ISP Mode” is updated.
Note of R03 port control register is updated.

“25.3 Hardware Conditions to Enter the ISP Mode” is updated.
Notes of R35 port control registers are updated.
R3CONH, R3CONL register‟s address are corrected at “Table 9-4 Control Register 4/4”
“R1 PORT PULL-UP ENABLE REGISTER table” is corrected.

“Figure 25-5 IIC Salve Receiving Timing Diagram” is modified.
“29.3 Hardware Conditions to Enter the ISP Mode” is updated.
Notes of R35 port control registers are updated.

“Figure 25-5 IIC Salve Receiving Timing Diagram” is modified.
“29.3 Hardware Conditions to Enter the ISP Mode” is updated.
Notes of R35 port control registers are updated.

Add Ordering Information.
Add 44MQFP PKG Information.

Remove "WDT‟ at "Stop release" description. "WDT‟ is not a release source of STOP mode.
8 SOP ordering name is changed from “MC81F4104D” to “MC81F4104M”.

Remove "WDT‟ at “Stop release” description. „WDT‟ is not a release source of STOP mode.
Change “fxin” to “fbuz” at buzzer frequency calculation in “BUZZER” chapter.

Add „Watch Timer‟ at stop release source at “Peripheral Operation During Power Saving Mode“ table in “Sleep vs Stop” chapter.
Change the representative name from „MC81F4416‟ to „MC81F4x16‟.
Remove „WDT‟ at “Stop release” description. „WDT‟ is not a release source of STOP mode.
Change “fxin” to “fbuz” at buzzer frequency calculation in “BUZZER” chapter

Change the representative name from „MC81F4432‟ to „MC81F4x32‟.
Remove „WDT‟ at “Stop release” description. „WDT‟ is not a release source of STOP mode.
Add „Watch Timer‟ at stop release source at “Peripheral Operation During Power Saving Mode“ table in “Sleep vs Stop” chapter.
Change “fxin” to “fbuz” at buzzer frequency calculation in “BUZZER” chapter.

Add rom writing endurance at features.

Add rom writing endurance at features.
Remove 16 bit timer mode at timer0.

Add rom writing endurance at features.

Add rom writing endurance at features.

Remove ��preliminary��.
Some errata are fixed. (I2C -> IIC, IICSDR->IICSCR)
Remove ��R57, R56, R55, R54�� in R5 port data register table.
Add ��Buzzer frequency table��.

Remove ��preliminary��.
Some errata are fixed.
Add ��Buzzer frequency table��.

Remove ��preliminary��.
Some errata are fixed.
Remove ��(or 16Bit *1ch)�� at timer clause of the feature page.

Remove ��preliminary��.
Some errata are fixed. (I2C -> IIC, IICSDR->IICSCR)
Remove ��R57, R56, R55, R54�� in R5 port data register table.
Add ��Buzzer frequency table��.

Operating voltage data was restored from exceptional case to normal one.
1nF CAP was additionally connected to REMOUT port.

Add a sub-chapter �Changing the stabilizing time‟ at the chapter �Power down operation‟.
Add a note for R00/R01 ports after R0CONH description.
One of BIT‟s clock source �2048‟ is changed to �1024‟.

Add a sub-chapter �Changing the stabilizing time‟ at the chapter �Power down operation‟.
Add a note for R33/R34 ports after R3CONH description.
One of BIT‟s clock source �2048‟ is changed to �1024‟.

Fix the erratum at �Ordering Information‟. �4216S‟ is changed to �4316‟ for 24 SSOP.
Add a sub-chapter �Changing the stabilizing time‟ at the chapter �Power down operation‟.
Add a note for R33/R34 ports after R3CONH description.
One of BIT‟s clock source �2048‟ is changed to �1024‟.

Add a sub-chapter �Changing the stabilizing time‟ at the chapter �Power down operation‟.
Add a note for R33/R34 ports after R3CONH description.
One of BIT‟s clock source �2048‟ is changed to �1024‟.

Description of ISP chapter is updated.
Operation range is changed.( 2.0v~5.5v > 2.2v~5.5v)

Description of SIO procedure is updated.
Description of ISP chapter is updated.

Description of SIO procedure is updated.
Description of ISP chapter is updated.
Note for 20 pin package is added at pin assignment and power down mode.

Description of SIO procedure is updated.
Description of ISP chapter is updated.

Electric Chareictoristics are updated.

Electric Chareictoristics are updated.

Electric Chareictoristics are updated.

Electric Chareictoristics are updated.

The SCLK pin for ISP is moved to R11 port.

The SCLK pin for ISP is moved to R11 port.
Add 24/20 pin devices information.

remove preliminary mark and restart version number.

Modify Timer capture mode description in ��Figure12-10 / Figure 12-11/Figure 12-15 8bit/16bit capture mode��.

Remove RC external oscilation options at Device Configuration Area.

Correct ‘Figure 19-1 Simple External Reset Circuit’.
Add clock source information at ‘Figure 11-1 Block Diagram of Basic Interval Timer’.

Correct the port structure of reest and Xin/Xout pin.
Add R33 and R34 informaiton.
Correct VPP and Reset circuit.
Correct the ISP connector drawings.

replace of HMS81C2232/48 and HMS81C2332/2348

20 TSSOP package is added. Change the pacakge name from ‘16 SOP( 153 mil )’ to ‘16 SOP( 150 mil )’.

16QFP package is added

'Low-Level Input Voltage Max Level Parameter' is changed from 0.2 VDD to 0.4VDD. 'Input High Voltage Min Level Parameter' is changed from 0.8VDD to 0.6VDD. MC2003 20 pin Package information is added.

Chinese Manual has Updated.

LCD Driver IC.

add package type in features.

Internal OSC specification is changed.

Internal OSC specification is changed.

Corrected Stack End Address to 0100H at Figure 8-4 on page 26. Corrected the address of PU2 to 00FEH at Figure 8-1 on page 30. Corrected the bit name of TM1to T1CK1,T1CK0,T1CN and T1ST at Figure 13-17 on page 67. Corrected the PWM1HR to T1PWHR at Figure 13-20 on page 69. Corrected the initial value of WDT Timer to “Enable” at Figure 20-1 on page 102.

Add C Flag to the No.53(INC A) of ARITHMETIC/LOGIC OPEATION in APENDIX.B. Change the full-name of device into MC80F5132C.Remove the Mask Option contents of 17.3 Low Voltage Detection Mode in Page 68.

Caution footnote for “INC A” instruction is added at " Arithmetic / Logic Operation" on page iv. The First Released Edition.

Change POR and Internal OSC characteristics on chapter ‘7.Electrical Characteristics’.

Added more information for "16.3 Low Voltage Detection Mode" on page 62. Fixed some errata.

Updated the figures of "6. PORT STRUCTURES" on page 10.

Add C Flag to the No.53(INC A) of ARITHMETIC/LOGIC OPEATION in APENDIX.B. Change the full-name of device into MC80F5132C.Remove the Mask Option contents of 17.3 Low Voltage Detection Mode in Page 68.

Updated the figures of "6. PORT STRUCTURES" on page 10. Updated the pull-up resistor control option of "B. MASK ORDER SHEET(HMS81004E/08E/16E/24E/32E)" on page x.

Delete wrong infomations about PLCC package and mask options.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Corrected PSW(NVGBHIZC) for “INC A” instruction from N-----ZC to N-----Z-.

Added the IOLcapability of Built in Transistor for I.R LED Drive.(Page 2) Added REMDRV Port IOL4and VOL4parameter data at Electrical characteristics.(Page 15) Added REMDRV IOL4vsVOL4 characteristic Graph.(Page 17) Added the pin description of MC40P5101D.(Page 11) Added REMOUT port structure.(Page 12) Added Chpater5 Circuit Diagram.(Page 47,48,49) Modified Characteristic Graph location and note(Page 15, 16, 17) Modified the REMOUT port of MC40P5001D & MC40P5201D to REMDRV.(Page 3, 5, 10)

8 bit FALSH MCU for Unified Remote.

Change PFD voltages from { 2.9v 3.2v 3.5v } to { 2.4v 2.7v 3.0v }

Added AVREF parameter minium voltage in 7.4 A/D Converter Charaeristics. Added charaeristics graphs in 7.6 Typical Characteristics.

Add more SIO information on descriptions of port and interrupt.

Add SEG Pin resistance graph.(10page) Add Key Scan example.(17page)

Correct Description and diagram of 8bit event counter.

Correct Description and diagram of 8bit event counter.

Correct Description and diagram of 8bit event counter.